5.2 KiB
5.2 KiB
Tasks: enterprise-server-cache-memory
Change ID: enterprise-server-cache-memory
Package: @suaveplan/cache-memory
Target path: server/data/cache-memory
Prerequisite packages on Verdaccio: @suaveplan/error, @suaveplan/types, @suaveplan/logger
0. Pre-flight (non-negotiable)
- 0.1 Confirm clean working tree (
git statusreports nothing) and no in-flight worktrees with uncommitted work (git worktree listthengit statusin each) - 0.2 If any worktrees exist under
.claude/worktrees/, account for each one: still-active agent, work-pending-merge, or stale-and-prune. Stale worktrees MUST be removed (git worktree remove) before opening a new one — code that has been lost twice on main is the failure mode this guards against. - 0.3 Confirm the package set in
MANIFEST.mdmatchesfind packages -maxdepth 3 -name package.jsoncount. Drift here means a prior change archived without regenerating the manifest.
1. Scaffold
- Create directory tree per
proposal.mdlayout. - Write
package.jsonat0.1.0,"sideEffects": false, exports map for".",adapter, andlru. - Add dependencies:
@suaveplan/error workspace:^,@suaveplan/types workspace:^,@suaveplan/logger workspace:^,zod catalog:forms,@opentelemetry/api catalog:observability,tslib catalog:build. - Add devDependencies:
vitest catalog:testing,@vitest/coverage-istanbul catalog:testing,fast-check catalog:testing,@suaveplan/testing workspace:^. tsconfig.jsonextendinglibrary.json;vitest.config.tsusingcreateTestConfig().- Scripts:
lint,typecheck,test,test:coverage,build,docs:check.
2. Types and errors
- Define
MemoryCacheOptions,CacheStats,MemoryCacheOptionsSchemainsrc/types/cache-memory.types.ts. - Write
cache-memory.types.md(≥200 words, both examples, API reference). src/error-codes.ts:MemoryCacheErrorCode, metadata,registerMemoryCacheErrorCodes(), eager call.
3. LRU data structure
- Implement
src/lru/lru-cache/lru-cache.ts:- Doubly-linked list + Map, O(1) get/set/delete.
LruCache<V>withmaxSize,get(k),set(k, v),delete(k),has(k),keys(),size.- On capacity exceeded: evict LRU (tail) entry; increment eviction counter.
- No external deps.
- Write
lru-cache.test.ts: LRU ordering, capacity eviction, re-access promotes entry, delete middle node, size tracking. - Write
lru-cache.md(≥200 words).
4. Memory cache adapter
- Implement
MemoryCacheAdapterinsrc/adapter/memory-cache-adapter/memory-cache-adapter.ts:- Owns an
LruCache<{ value: Uint8Array; expiresAt?: number }>. get(key): check expiry usingclock.now()(orDate.now()when no clock); on expiry calldelete(key)and returnundefined; increment hit/miss counter.set(key, value, ttlMs?): store entry withexpiresAt = clock.now() + ttlMswhen TTL supplied; evict ifmaxSizeexceeded (handled by LRU internally).delete(key): remove entry; returntrueif existed.has(key): get + check expiry; return bool.list(prefix?): iterate keys, skip expired, filter by prefix.clear(): reset LRU; reset stats.ttl(key):expiresAt - clock.now()orundefined.size(): current entry count.stats(): returnCacheStatssnapshot.- OTel: counter
cache_memory.ops_total(operation, hit); histogramcache_memory.duration_ms.
- Owns an
- Export
createMemoryCacheAdapter(options?). - Write
memory-cache-adapter.types.tswith internal types. - Write
memory-cache-adapter.test.ts(≤500 lines): all CRUD, TTL expiry with FakeClock, LRU eviction order, stats accuracy, concurrent access (synchronous — no real concurrency needed), logger invocations. - Write
memory-cache-adapter.md(≥200 words, simple + advanced, full API reference).
5. Property-based tests
- Write
tests/property.test.ts(≤500 lines,{ timeout: 30000 }on each):- Get/set round-trip: for arbitrary keys + values,
setthengetreturns the same bytes. - Delete removes: after
set+delete,getreturnsundefined. - TTL expiry consistency: entries with
ttlMs = 0never returned on nextgetwith advanced clock. - LRU ordering: inserting N+1 entries into a size-N cache results in the oldest-accessed entry being evicted.
- Stats accuracy:
hits + misses === total get callsfor arbitrary call sequences.
- Get/set round-trip: for arbitrary keys + values,
6. OTel + docs
- Counter
cache_memory.ops_total; histogramcache_memory.duration_msas specified. - All
.mdfiles per layout; rootREADME.mdwith quick-start, FakeClock testing example, API table, deps table.
7. Verify and publish
bunx turbo lint --filter=@suaveplan/cache-memory— zero errors.bunx turbo typecheck --filter=@suaveplan/cache-memory— zero errors.bunx turbo test --filter=@suaveplan/cache-memory— all tests pass.bunx turbo test:coverage --filter=@suaveplan/cache-memory— 100%.- Confirm
"sideEffects": falseset; noTODO/any/.skipinsrc/. bun scripts/publish.ts --package @suaveplan/cache-memory.- Update
CLAUDE.md; archive toopenspec/archive/2026-04-24-enterprise-server-cache-memory/.